@thesis{rudolf_fault-tolerant_2025,
	title = {Fault-tolerant Design Techniques for Nano-Mechanical Circuits},
	url = {https://repositum.tuwien.at/handle/20.500.12708/212004},
	abstract = {The shift from conventional manufacturing and monitoring techniques to systems with decentralised,interconnected, and increasingly self-aware components has created a demand for edge-devices thatare capable of operating under harsh environmental conditions, such as high temperatures or high radiation doses. Due to constrained resources and limited supply, these edge-devices also require efficientcircuitry with low leakage current. Traditional complementary metal-oxide-semiconductor ({CMOS})technology is not suitable for meeting these requirements.The i-{EDGE} project aims to establish nanoelectromechanical ({NEM}) relays as substitutes for {CMOStransistors} to address the aforementioned challenges. However, at the current Technology {ReadinessLevel} ({TRL}) of the project, the yield of manufactured {NEM} circuits, as well as the reliability under operation, is significantly lower than in {CMOS} technology. To tackle this issue, it is necessary to explorefault-tolerant design techniques that can be applied to {NEM} circuits.This thesis first derives fault models from the physical defects that can occur in {NEM} devices. Con-ventional fault-tolerant design techniques are then reviewed and assessed for their applicability to {NEMcircuits}. The unique characteristics of {NEM} devices are leveraged to simplify or enhance established fault-tolerant circuit designs, as well as to propose new {NEM} circuit designs. A simulation environmentis developed to simulate test circuits with fault-tolerant design techniques applied. The resulting datais used to explore the design space and to evaluate the achievable fault tolerance.},
	type = {phdthesis},
	author = {Rudolf, Dominik},
	editora = {Jantsch, Axel and Elahi, Ardavan},
	editoratype = {collaborator},
	urldate = {2025-04-01},
	date = {2025},
	langid = {english},
	note = {Artwork Size: 89 pages
Medium: application/pdf
Publisher: {TU} Wien},
	keywords = {Digital Circuit design, Digital circuit design, Fault tolerant design, {VHDL}, Verilog},
}